SPI Flash Chip - MXIC(MX25L4005 & MX25L8005) Command List

FEATURE

GENERAL

.Serial Peripheral Interface(SPI) compatible -- Mode 0 and Mode 3

.4,194,304 x 1 bit structure for 4 M; 8,388,608 x 1 bit structure for 8M

.128 Equal Sectors with 4K byte each (MX25L4005)

 256 Equal Sectors with 4K byte each (MX25L8005)

 -Any sector can be erased indivdually

.8 Equal Blocks with 64K byte each (MX25L4005)

 16 Equal Blocks with 64K byte each (MX25L8005)

 -Any Blocks can be erased indivdually

.Single Power Supply Operation

 -2.7 to 3.6 volt for read, erase, and program operations

.Latch-up protected to 100mA form -1V to Vcc +1V

.Low Vcc write inhibit is from 1.5V to 2.5V

PERFORMANCE

.High Performance

 -Fast access time: 70MHz serial clock(15pF + 1TTL Load) and 66MHz Serial clock (30pF + 1TTL Load)

 -Fast program time: 1.4ms(typ.) and 5ms(max.)/page(256-byte per page)

 -Fast erase time: 90ms(typ.) and 3s(max.)/block(64K-bytr per block)

.Low Power Consumption

 -Low active read current: 12mA(max.) at 70MHz, 8mA(max.) at 66MHz and 4mA(max.) at 33MHz

 -Low active programming current: 30mA(max.)

 -Deep power-down mode 1uA(typical)

.Minimum 100,000 erase/program cycles

SOFTWARE FEATURES

.Input Data Format

 -1-byte Command code

. Block Lock protection

 -The BP0~BP2 status bit defines the size of the area to be software protected against Program and Erase instructions.

.Auto Erase and Auto Program Algorithm

 -Automatically erases and verifies data at selected sector

 -Automatically programs and verifies data at selected page by an internal algorithm that automatically times the program pluse widths (Any page to be programed should have page in the erased state first)

.Status Register Feature

.Electronic Identification

 -JEDEC 2-byte Device ID

 - RES command, 1-byte Device ID

HARDWARE FEATURE

.SCLK clock input

 -Serial clock input

.SI Input

 -Serial Data Input

.SO Output

 -Serial Data Output

.WP# pin

 -Hardware write protection

.HOLD# pin

 - pause the chip without diselecting the chip

.PACKAGE

 -8-pin SOP(150mil)

 -8-pin SOP(200mil)

 -8-land SON(6x5mm)

Command Definition

COMMAND(byte)	1st	2nd	3rd	4th	5th	Action
WREN(Write Enable)	06h					Sets the (WEL) write enable latch bit
WRDI(Write Disable)	04h					Resets the (WEL) write enable latch bit
RDID(Read Identification)	9Fh					Output the manufacturer ID and 2-byte device ID
RDSR(Read Status Register)	05h					To read out the status register
WRSR(Write Status Register)	01h					n bytes read out until CS# goes high
READ(Read Data)	03h	AD1	AD2	AD3
Fast Read(Fast Read Data)	0Bh	AD1	AD2	AD3	X
SE(Sector Erase)	20h	AD1	AD2	AD3
BE(Block Erase)	52h D8h	AD1	AD2	AD3
CE(Chip Erase)	60h C7h
PP(Page Program)	02h	AD1	AD2	AD3
DP(Deep Power Down)	B9h
RDP(Release from Deep Power-down)	ABh
RES(Read Electronic ID)	ABh	X	X	X
REMS(Read Electronic Manufacturer & Device ID)	90h	X	X	(ADD(1))		Output the manufacturer ID and device ID

(1). ADD=00H will output the manufacturer’s ID first and ADD=01H will output device ID first.

(2). It is not recommended to adopt any other code which is not in the above command definition table.

Table of ID Definitions:

RDID Command	Manufacturer ID	Memory Type	Memory Density
MX25L8005	C2	20	14
MX25L4005	C2	20	13
RES Command	Electronic ID
MX25L8005	13
MX25L4005	12
REMS Command	Manufacturer ID	Device ID
MX25L8005	C2	13
MX25L4005	C2	12