Features
> 2Mbit High Speed SPI Serial Flash Memory.
2M (262,144 x 8)
> Serial Peripheral Interface (SPI)
Compatible
> Supports SPI Modes 0 (0,0) and 3 (1,1)
> 33 MHz Clock Rate
> Byte Mode and 256-byte Page Mode for
Program Operations
> Sector Architecture:
-
Four
Sectors with 64K Bytes Each
-
256
Pages per Sector
> Product Identification Mode
> Low-voltage Operation
-
2.7
(Vcc = 2.7V to 3.6V)
> Sector Write Protection
-
Protect
1/4, 1/2 or Entire Array
> Write Protect (WP) Pin and Write Disable
Instructions for both Hardware and Software Data Protection
> Self-timed Program Cycle (30 µs/Byte
Typical)
> Self-timed Sector Erase Cycle (1
second/Sector Typical)
> Single Cycle Reprogramming (Erase and
Program) for Status Register
> High Reliability
-
Endurance:
10,000 Write Cycles Typical
-
Data
Retention: 20 Years
> 8-lead JEDEC SOIC
Command Listing
Command
|
Opcode
|
Operation
|
WREN
|
06h(0000 X110B)
|
Set Write Enable
Latch
|
WRDI
|
04h(0000 X100B)
|
Reset Write
Enable Latch
|
RDSR
|
05h(0000 X101B)
|
Read Status
Register
|
WRSR
|
01h(0000 X001B)
|
Write Status
Register
|
READ
|
03h(0000 X011B)
|
Read Data from
Memory Array
|
PROGRAM
|
02h(0000 X010B)
|
Program Data
Into Memory Array
|
SECTOR ERASE
|
52h(0101 X010B)
|
Erase One Sector
in Memory Array
|
CHIP ERASE
|
62h(0110 X010B)
|
Erase All
Sectors in Memory Array
|
RDID
|
15h(0001 X101B)
|
Read
Manufacturer and Product ID
|
Status Register
Format
Bit
|
7
|
6
|
5
|
4
|
3
|
2
|
1
|
0
|
WPEN
|
X
|
X
|
X
|
BP1
|
BP0
|
WEN
|
/RDY
|
Read Status
Register Bit Definition
Bit
|
Definition
|
Bit 0 (/RDY)
|
Bit 0 = 0 (RDY)
indicates the device is READY. Bit 0 = 1 indicates the
write cycle is
in progress.
|
Bit 1 (WEN)
|
Bit 1 = 0
indicates the device is not WRITE ENABLED. Bit 1 = 1 indicates
the device is
WRITE ENABLED.
|
Bit 2 (BP0)
|
See Block Write
Protect Bits Table.
|
Bit 3 (BP1)
|
See Block Write
Protect Bits Table.
|
Bits 4-6 are 0s
when device is not in an internal write cycle.
|
|
Bit 7 (WPEN)
|
See WPEN
Operation Table.
|
Bits 0-7 are 1s
during an internal write cycle.
|
Block Write
Protect Bits Table
Level
|
Status Register
Bits
|
AT25F2048
|
||
BP1
|
BP0
|
Array Addresses
Locked Out
|
Locked-out
Sector(s)
|
|
0
|
0
|
0
|
None
|
None
|
1(1/4)
|
0
|
1
|
030000 - 03FFFF
|
Sector 4
|
2(1/2)
|
1
|
0
|
020000 - 03FFFF
|
Sector 3, 4
|
3(All)
|
1
|
1
|
000000 - 03FFFF
|
All sectors (1 -
4)
|
WPEN Operation
Table
WPEN
|
WP
|
WEN
|
ProtectedBlocks
|
UnprotectedBlocks
|
Status Register
|
0
|
X
|
0
|
Protected
|
Protected
|
Protected
|
0
|
X
|
1
|
Protected
|
Writable
|
Writable
|
1
|
Low
|
0
|
Protected
|
Protected
|
Protected
|
1
|
Low
|
1
|
Protected
|
Writable
|
Protected
|
X
|
High
|
0
|
Protected
|
Protected
|
Protected
|
X
|
High
|
1
|
Protected
|
Writable
|
Writable
|
Address Key
Address
|
AT25F2048
|
An
|
A17 - A0
|
Don’t Care Bits
|
A23 - A18
|
Sector Addresses
Sector Address
|
AT25F2048 Sector
|
000000 to 00FFFF
|
Sector 1
|
010000 to 01FFFF
|
Sector 2
|
020000 to 02FFFF
|
Sector 3
|
030000 to 03FFFF
|
Sector 4
|
Manufacturer and
Device ID Information
Byte No.
|
Data Type
|
Value
|
1
|
Manufacturer ID
|
1Fh
|
2
|
Device ID (Part
1)
|
63h
|
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