SPI Flash Chip - Atmel(AT26F004) Command List

Features

> Single 2.7V - 3.6V Supply

> Serial Peripheral Interface (SPI) Compatible

-        Supports SPI Modes 0 and 3

> 33 MHz Maximum Clock Frequency

> Flexible, Uniform Erase Architecture

-        4-Kbyte Blocks

-        32-Kbyte Blocks

-        64-Kbyte Blocks

-        Full Chip Erase

> Optimized Physical Sectoring for Code Shadowing and Code + Data Storage Applications

-        One 16-Kbyte Top Boot Sector

-        Two 8-Kbyte Sectors

-        One 32-Kbyte Sector

-        Seven 64-Kbyte Sectors

> Individual Sector Protection for Program/Erase Protection

> Hardware Controlled Locking of Protected Sectors

> Byte Program Architecture with Sequential Byte Program Mode Capability

-        Sequential Byte Program Mode Improves Throughput for Programming Multiple Bytes

> JEDEC Standard Manufacturer and Device ID Read Methodology

> Low Power Dissipation

-        7 mA Active Read Current (Typical)

-        15 µA Deep Power-down Current (Typical)

> Endurance: 100,000 Program/Erase Cycles

> Data Retention: 20 Years

> Complies with Full Industrial Temperature Range

> Industry Standard Green (Pb/Halide-free/RoHS Compliant) Package Options

-        8-lead SOIC (150-mil and 208-mil wide)

-        8-pad MLF (6 x 5 x 1.00 mm)

Command Listing

Command	Opcode	Address Bytes	Dummy Bytes	Data Bytes
Read Commands
Read Array	0Bh(0000 1011B)	3	1	1+
Read Array (Low Frequency)	03h(0000 0011B)	3	0	1+
Program and Erase Commands
Block Erase (4 Kbytes)	20h(0010 0000B)	3	0	0
Block Erase (32 Kbytes)	52h(0101 0010B)	3	0	0
Block Erase (64 Kbytes)	D8h(1101 1000B)	3	0	0
Chip Erase	60h(0110 0000B)	0	0	0
	C7h(1100 0111B)	0	0	0
Byte/Page Program (1 to 256 Bytes)	02h(0000 0010B)	3	0	1+
Sequential Program Mode	AFh(1010 1111B)	3, 0	0	1
Protection Commands
Write Enable	06h(0000 0110B)	0	0	0
Write Disable	04h(0000 0100B)	0	0	0
Protect Sector	36h(0011 0110B)	3	0	0
Unprotect Sector	39h(0011 1001B)	3	0	0
Read Sector Protection Registers	3Ch(0011 1100B)	3	0	1+
Status Register Commands
Read Status Register	05h(0000 0101B)	0	0	1+
Write Status Register	01h(0000 0001B)	0	0	1
Miscellaneous Commands
Read Manufacturer and Device ID	9Fh(1001 1111B)	0	0	1 to 4
Deep Power-down	B9h(1011 1001B)	0	0	0
Resume from Deep Power-down	ABh(1010 1011B)	0	0	0

Note: Three address bytes are only required for the first operation to designate the address at which to start the programming. Afterwards, the internal address counter automatically increments, so subsequent Sequential Program Mode operations only require clocking in of the opcode and the data byte until the Sequential Program Mode has been exited.

Sector Protection Register Values

Value	Sector Protection Status
0	Sector is unprotected and can be programmed and erased.
1	Sector is protected and cannot be programmed or erased. This is the default state.

Read Sector Protection Register – Output Data

Value	Sector Protection Register Value
00h	Sector Protection Register value is 0 (sector is unprotected).
FFh	Sector Protection Register value is 1 (sector is protected).

Status Register Format

Bit	Name		Type	Description
7	SPRL	Sector Protection Registers Locked	R/W	0	Sector Protection Registers are unlocked (default).
				1	Sector Protection Registers are locked.
6	SPM	Sequential Program Mode Status	R	0	Byte/Page Programming Mode (default).
				1	Sequential Programming Mode entered.
5	EPE	Erase/Program Error	R	0	Erase or program operation was successful.
				1	Erase or program error detected.
4	WPP	Write Protect (WP) Pin Status	R	0	WP is asserted.
				1	WP is deasserted.
3:2	SWP	Software Protection Status	R	00	All sectors are software unprotected (all Sector Protection Registers are 0).
				01	Some sectors are software protected. Read individual Sector Protection Registers to determine which sectors are protected.
				10	Reserved for future use.
				11	All sectors are software protected (all Sector Protection Registers are 1 – default).
1	WEL	Write Enable Latch Status	R	0	Device is not write enabled (default).
				1	Device is write enabled.
0	RDY/BSY	Ready/Busy Status	R	0	Device is ready.
				1	Device is busy with an internal operation.

Notes:

1.     Only bit 7 of the Status Register will be modified when using the Write Status Register command.

2.     R/W = Readable and writable R = Readable only

Manufacturer and Device ID Information

Byte No.	Data Type	Value
1	Manufacturer ID	1Fh
2	Device ID (Part 1)	04h
3	Device ID (Part 2)	00h
4	Extended Device Information String Length	00h

Manufacturer and Device ID Details

Data Type	7	6	5	4	3	2	1	0	Hex Value	Details
Manufacturer ID	JEDEC Assigned Code								1Fh	JEDEC Code: 0001 1111 (1Fh for Atmel)
	0	0	0	1	1	1	1	1
Device ID (Part 1)	Family Code			Density Code					04h	Family Code: 000 (AT26Fxxx series) Density Code: 00100 (4-Mbit)
	0	0	0	0	0	1	0	0
Device ID (Part 2)	Sub Code			Product Version Code					00h	MLC Code: 000 (1-bit/cell technology) Product Version: 00000 (Initial version)
	0	0	0	0	0	0	0	0