BIOS(Option ROM) Introduction

[BIOS]

The Basic Input Output System is the system software embedded on a chip located on the computer’s main board. The BIOS executes POST to test and initialize the system components and then boots the operating system. The BIOS also handles the low-level input/output to the various peripheral devices connected to the computer at run time. Additionally, most BIOSes have a Setup program that allows the user to configure the system.

[Option ROM]

An Option ROM (Read Only Memory) is a software component located in a ROM chip on an add-in card or the system board. Its physical address is in system memory between addresses C0000h and DFFFFh. The BIOS may copy the component to shadow memory during POST. An Option ROM is characterized by the first two locations containing a two-byte signature of 55h AAh. Option ROMs are responsible for initializing their associated hardware, allowing it to be available to the rest of the system for booting or run time.

[Gate A20]

Gate A20 controls 1MB memory wrap-around. When Gate A20 is enabled, it forces memory accesses to wrap around and fall within the 0-1MB area by forcing address line 20 to be zero. This has the effect of not allowing access to extended memory. When Gate A20 is disabled, memory accesses beyond 1MB do not wrap around, thus allowing access to all of extended memory.

[Flat Real Mode]

Real mode, also called real address mode, is an operating mode of all x86-compatible CPUs. Real mode is characterized by a 20-bit segmented memory address space (giving exactly 1 MB of addressable memory) and unlimited direct software access to all memory, I/O addresses and peripheral hardware. Real mode provides no support for memory protection, multitasking, or code privilege levels. Before the release of the 80286, which introduced Protected mode, real mode was the only available mode for x86 CPUs. In the interests of backwards compatibility, all x86 CPUs start in real mode when reset.

[PMM]

The POST Memory Manager is a software component of the BIOS that provides for the allocation of memory blocks during system POST.

Search server header in E000:0000 ~ FFFF:0000

[Extended BIOS Data Area (EBDA)]

Memory location 40:0e (2 bytes) contains EBDA segment.

Memory location 40:13 (2 bytes) contains size of conventional memory in units of 1K.

Example:

40:0e = 0x8e00                  40:0e = 0x8d80

40:13 = 0x266       ==>       40:13 = 0x264

8e00:0 = 0x08(K)                     8d80:0 = 0x0A(K)

[POST]

The Power-On Self-Test is the part of the BIOS that takes control immediately after the computer is turned on. POST initializes the computer hardware in preparation for loading the operating system.

[Run-Time]

Execution of run-time software takes place after the operating system has loaded. BIOS run-time services are available at POST and remain callable after the operating system has booted. Application programs and operating systems call BIOS run-time services for hardware-related functions. The PMM Services are not callable during run-time, and buffers allocated by the PMM during POST are not available at runtime.

[Header Structure]

BCV: Boot Connection Vector