DMA Setup FIS – Device to Host or Host to Device (Bidirectional) - FIS Type (41h)

DMA Setup – Device to Host or Host to Device (Bidirectional) FIS:

		31		30	29	28	27	26	25	24		23	22	21	20	19	18	17	16	15	14		13		12		11	10	9	8	7	6	5	4	3	2	1	0
	0		Reserved								Reserved									A		I		D		R	PM Port				FIS Type (41h)
	1		DMA Buffer Identifier Low
	2		DMA Buffer Identifier High
	3		Reserved
	4		DMA Buffer Offset
	5		DMA Transfer Count
	6		Reserved

FIS Type - Set to a value of 41h. Defines the rest of the FIS fields. Defines the total length of the FIS as seven Dwords.

D Direction - Specifies whether subsequent data transferred after this FIS is from transmitter to receiver or from receiver to transmitter If set to one the direction is transmitter to receiver.If cleared to zero, the direction is receiver to transmitter.

A Auto-Activate - If set to one, in response to a DMA Setup FIS with data transfer direction of Host-to-Device, causes the host to initiate transfer of the first Data FIS to the device after the DMA context for the transfer has been established. The device shall not transmit a DMA Activate FIS to trigger the transmission of the first Data FIS from the host. If cleared to zero, a DMA Activate FIS is required to trigger the transmission of the first Data FIS from the host when the data transfer direction is Host-to-Device.

DMA Buffer Identifier Low/High - This field is used to identify a DMA buffer region in host memory. The contents are not described in this specification and are host dependent. The buffer identifier is supplied by the host to the device and the device echoes it back to the host. This allows the implementation to pass a physical address or or, in more complex implementations, the buffer identifier could be a scatter gather list or other information that may identify a DMA channel”.

DMA Buffer Offset - This is the byte offset into the buffer. Bits [1:0] shall be zero.

DMA Transfer Count - This is the number of bytes to be read or written. Bit zero shall be zero.

I Interrupt - If the Interrupt bit is set to one an interrupt pending shall be generated when the DMA transfer count is exhausted. Devices shall not modify the behavior of this bit based on the state of the nIEN bit received in Register Host to Device FISes.

PM Port –When an endpoint device is attached via a Port Multiplier, specifies the device port address that the FIS should be delivered to or is received from. This field is set by the host for Host to Device transmission and this field is set by the Port Multiplier for Device to Host transmission. Endpoint devices shall set this field to 0h for Device to Host transmissions.

R – Reserved – shall be cleared to zero. 

DMA Activate FIS - Device to Host - FIS Type (27h)

DMA Activate - Device to Host FIS(39h):

		31		30	29	28	27	26	25	24		23	22	21	20	19	18	17	16	15	14		13		12		11	10	9	8	7	6	5	4	3	2	1	0
	0		Reserved								Reserved									R		R		R		R	PM Port				FIS Type (39h)

FIS Type - Set to a value of 39h. Defines the rest of the FIS fields. Defines the length of the FIS as one Dword.

PM Port –When an endpoint device is attached via a Port Multiplier, specifies the device port address that the FIS is received from. This field is set by the Port Multiplier. Endpoint devices shall set this field to 0h.

R – Reserved – shall be cleared to zero. 

判斷Mac如何被叫醒?

此文章從下列鏈結翻譯而來：
Determine Why Your Mac Wakes Up From Sleep


你曾經把你的MAC做睡眠(sleep)，當您返回到本機時，才發現它似乎是被它自己所喚醒？ 我已經碰到這個奇怪的問題好幾次了，與幾個終端命令可以幫助你去追查是什麼原因造成Mac從睡眠狀態被喚醒。

啟動終端機，然後輸入下面指令在命令列：

syslog |grep -i "Wake reason"
接下來你將會看到一份列表從系統日誌，那看起來如下：

Sat May 10 08:49:33 MacBookPro kernel[0] : Wake reason = OHC1
Sat May 11 17:21:57 MacBookPro kernel[0] : Wake reason = PWRB
Sun May 15 08:34:20 MacBookPro kernel[0] : Wake reason = EHC2
Sun May 20 18:25:28 MacBookPro kernel[0] : Wake reason = OHC1


現在你會想看“Wake reason=”旁邊文字的代碼。那麼這些喚醒原因的代碼是什麼意思？

OHC:開放式主機控制器支援，通常是USB或Firewire。如果你看到OHC1或OHC2，它幾乎可以確定是一個外接USB鍵盤或鼠標來喚醒此機器。

EHC:增強型主機控制器支援，是另一個USB介面，但也能夠是無線(wireless)與藍牙(bluetooth)設備，因為它們也是裝在Mac的USB匯流排上。

USB:一個USB裝置喚醒此機器。

LID0:這就是你的MacBook或Pro的蓋子，當你開啟蓋子時，機器將從睡眠中喚醒。

PWRB:代表的是電源按鈕，在你的Mac上，這個是物理電源按鈕。

RTC:即時計時器警報信號，一般而言是喚醒需求(wake-on-demand)的服務，像是當你安排睡眠與喚醒，經由在Mac上的節能控制面板。它也可以是啟動設定，使用者應用程式，備份，和其他預定的事件。

那裡可能有一些其他的代碼（例如：PCI，GEGE，等等。），但在上面是大部分的人將看見在系統日誌中。一旦你找到了這些代碼，你可以縮小範圍到底是什麼原因造成你的Mac從睡眠被喚醒，表面上看來是任意地。

注意：您還可以監視這喚醒的原因代碼經由控制台來觀察，如果你不習慣的命令行上操作。然而，在我過去的經驗裡，搜索和使用控制台是比終端機慢的。這通常是因為系統預設的字符串在控制台上比對搜索，它將通過所有你的系統與應用程式日誌，包括那些來自第三方的。

Device to Host FIS - FIS Type (34h)

Device to Host FIS:

		31		30	29	28	27	26	25	24		23	22	21	20	19	18	17	16	15	14		13		12		11	10	9	8	7	6	5	4	3	2	1	0
	0		Error								Status									R		I		R		R	PM Port				FIS Type (34h)
	1		Device								LBA(23:16)									LBA(15:8)											LBA(7:0)
	2		Reserved)								LBA(47:40)									LBA(39:32)											LBA(31:24)
	3		Reserved								Reserved									Count(15:8)											Count(7:0)

FIS Type - Set to a value of 34h. Defines the rest of the FIS fields. Defines the length of the FIS as five Dwords.

LBA(7:0) - Contains the contents of the LBA Low register of the Shadow Register Block.

LBA(15:8) - Contains the contents of the LBA Mid register of the Shadow Register Block.

LBA(39:32) – Contains the contents of the expanded address field of the Shadow Register Block

LBA(23:16) - Contains the contents of the LBA High register of the Shadow Register Block.

LBA(47:40) – Contains the contents of the expanded address field of the Shadow Register Block

Device - Contains the contents of the Device register of the Shadow Register Block.

PM Port –When an endpoint device is attached via a Port Multiplier , specifies the device port address that the FIS is received from. This field is set by the Port Multiplier. Endpoint devices shall set this field to 0h.

R – Reserved – shall be cleared to zero.

Count(7:0) - Contains the contents of the Sector Count register of the Shadow Register Block.

Count(15:8) – Contains the contents of the expanded address field of the Shadow Register Block

LBA(7:0) - Contains the contents of the LBA Low register of the Shadow Register Block.

LBA(31:24) – Contains the contents of the expanded address field of the Shadow Register Block.

Error - Contains the new value of the Error register of the Shadow Register Block.

I - Interrupt bit. This bit reflects the interrupt bit line of the device. Devices shall not

modify the behavior of this bit based on the state of the nIEN bit received in Register Host to Device FISes.

Host to Device FIS - FIS Type (27h)

Host to Device FIS:

		31		30	29	28	27	26	25	24		23	22	21	20	19	18	17	16	15	14		13		12		11	10	9	8	7	6	5	4	3	2	1	0
	0		Features(7:0)								Command									C		R		R		R	PM Port				FIS Type (27h)
	1		Device								LBA(23:16)									LBA(15:8)											LBA(7:0)
	2		Features(15:8)								LBA(47:40)									LBA(39:32)											LBA(31:24)
	3		Control								ICC									Count(15:8)											Count(7:0)

FIS Type - Set to a value of 27h. Defines the rest of the FIS fields. Defines the length of the FIS as five Dwords.

C - This bit is set to one when the register transfer is due to an update of the Command register. The bit is cleared to zero when the register transfer is due to an update of the Device Control register. Setting C bit to one and SRST bit to one in the Device Control Field is invalid and results in indeterminate behavior.

Command - Contains the contents of the Command register of the Shadow Register Block.

LBA(7:0) - Contains the contents of the LBA Low register of the Shadow Register Block.

Control - Contains the contents of the Device Control register of the Shadow Register Block.

LBA(15:8) - Contains the contents of the LBA Mid register of the Shadow Register Block.

LBA(39:32) – Contains the contents of the expanded address field of the Shadow Register Block

LBA(23:16) - Contains the contents of the LBA High register of the Shadow Register Block.

LBA(47:40) – Contains the contents of the expanded address field of the Shadow Register Block

Device - Contains the contents of the Device register of the Shadow Register Block.

Features(7:0) - Contains the contents of the Features register of the Shadow Register Block.

Features(15:8) – Contains the contents of the expanded address field of the Shadow Register Block

PM Port – When an endpoint device is attached via a Port Multiplier, specifies the device port address that the FIS should be delivered to. This field is set by the host.

R – Reserved – shall be cleared to zero.

Count(7:0) - Contains the contents of the Sector Count register of the Shadow Register Block.

Count(15:8) – Contains the contents of the expanded address field of the Shadow Register Block

LBA(7:0) - Contains the contents of the LBA Low register of the Shadow Register Block.

LBA(31:24) – Contains the contents of the expanded address field of the Shadow Register Block.

ICC - Isochronous Command Completion (ICC) contains a value is set by the host to inform device of a time limit. If a command does not define the use of this field, it shall be reserved.