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2012年10月7日 星期日

SPI Flash Chip - MXIC(MX25L1605D & MX25L3205D & MX25L6405D) Command List

MXIC(MX25L1605D & MX25L3205D & MX25L6405D)
FEATURE
General
.Serial Peripheral Interface(SPI) compatible -- Mode and Mode 3
.16M:16,777,216 x 1 bit structure or 8,388,608 x 2 bits(two I/O read mode) structure
 32M:33,554,432 x 1 bit structure or 16,777,216 x 2 bits(two I/O read mode) structure
 64M:67,108,864 x 1 bit structure or 33,554,432 x 2 bits(two I/O read mode) structure
.512 Equal Sectors with 4K byte each (16Mb)
 1024 Equal Sectors with 4K byte each (32Mb)
 2048 Equal Sectors with 4K byte each (64Mb)
 -Any Sector can be erased individually
.Single Power Supply Operation
 -2.7 to 3.6 volt for read, erase, and program operations
.Latch-up protected to 100mA from -1V to Vcc +1V
.Low Vcc write inhibit is from 1.5V to 2.5V

Performance
.High Performance
 -Fast access time: 85MHz serial clock(15pF + 1TTL Load) and 66MHz serial clock(30pF + 1TTL Load)
 -SPI clock of two I/O read mode: 50MHz(15pF + 1TTL Load), which is equivalent to 100MHz
 -Fast program time:1.4ms(typ.) and 5ms(max.)/page(256-byte per page)
 -Byte program time:7us(typical)
 -Continuously program mode(automatically increase address under word program mode)
 -Fast erase time: 50ms(typ.)/parameter sector(1K byte);60ms(typ.)/sector(4K-byte per sector);1s(typ.)/block(64k-byte per block);14s(typ.)/chip for 16Mb, 25s(typ.) for 32Mb, and 50s(typ.) for 64Mb
.Low Power Consumption
 -Low active read current: 25mA(max.) at 85MHz, 20mA(max.) at 66MHz and 10mA(max.) at 33MHz
 -Low active programming current:20mA(max.)
 -Low active erase current: 20mA(max.)
 -Deep power-down mode 1uA(typical)
.Minimum 100,000 erase/program cycles

Software Feature
.Input Data Format
 -1-byte Command code
.Adavanced Security Features
 -Block lock protection
 The BP0-BP3 status bit defines the size of the area to be software protection against program and erase instructions
 -Additional 512-bit secured OTP for unique identifier
.Auto Erase and Auto Program Algorithm
 -Automatically erases and verifies data at selected sector
 -Automatically programs and verifies data at selected page by an internal algorithm that automatically times the program pulse widths(Any page to be programed should have page in the erased state first)
.Status Register Feature
.Electronic Identification
 -JEDEC 1-byte manufacturer ID and 2-bytr device ID
 -RES command for 1-byte Device ID
 -Both REMS and REMS2 commands for 1-byte manufacturer ID and 1-byte device ID

Hardware Features
.SCLK Input
 -Serial Clock Input
.SI Input
 -Serial Data Input
.SO Output
 -Serial Data Output
.WP#/ACC pin
 -Hardware write protection and program/erase acceleration
.HOLD# pin
 -pause the chip without diselecting the chip
.PACKAGE
 -16-pin SOP(300mil)
 -8-land WSON (8x6mm or 6x5mm)
 -8-pin SOP (200mil, 150mil)
 -All Pb-free device are RoHS compliant

Alternative
.Security Serial Flash(MX25L1615D/MX25L3215D/MX25L6415D) may provides additional protection features for option. The datasheet is provided under NDA.

Additional Feature Comparison
 Additional Features



Part Name
Protect and security
Read Performance
Identifier
Flexible Block protection(BP0 – BP3)
512-bit secured OTP
2 I/O Read (50MHz)
Device ID(command: AB hex)
Device ID(command: 90 hex)
Device ID(command: EF hex)
REID ID(command: 9F hex)
MX25L1615D
V
V
V
14 (hex)
C2 14 (hex)(if ADD=0)
C2 14 (hex)(if ADD=0)
C2 20 14 (hex)
MX25L3215D
V
V
V
15 (hex)
C2 15 (hex)(if ADD=0)
C2 15 (hex)(if ADD=0)
C2 20 15 (hex)
MX25L6415D
V
V
V
16 (hex)
C2 16 (hex)(if ADD=0)
C2 16 (hex)(if ADD=0)
C2 20 16 (hex)

COMMAND DEFINITION
COMMAND(byte)
1st
2nd
3rd
4th
5th
Action
WREN(Write Enable)
06h




Sets the (WEL) write enable latch bit
WRDI(Write Disable)
04h




Resets the (WEL) write enable latch bit
RDID(Read Identification)
9Fh




Output the manufacturer ID and 2-byte device ID
RDSR(Read Status Register)
05h




To read out the status register
WRSR(Write Status Register)
01h




To write new values to the status register
READ(Read Data)
03h
AD1
AD2
AD3

n bytes read out until CS# goes high
FAST READ(Fast Read Data)
0Bh
AD1
AD2
AD3
X
n bytes read out until CS# goes high
2READ(2x I/O read command) note1
BBh
ADD(2)
ADD(2) & Dummy(2)


n bytes read out by 2x I/O until CS# goes high
SE(Sector Erase)
20h
AD1
AD2
AD3

To erase the selected sector
BE(Block Erase)
D8h
AD1
AD2
AD3

To erase the selected block
CE(Chip Erase)
60h
C7h




To erase whole chip
PP(Page Program)
02h
AD1
AD2
AD3

To program the selected page
CP(Continuously program mode)
ADh
AD1
AD2
AD3

Continuously program whole chip, the address is automatically increase
DP(Deep Power Down)
B9h




Enters deep power down mode
RDP(Release from Deep Power-down)
ABh




Release from deep power down mode
RES(Read Electronic ID)
ABh
X
X
X

To read out 1-byte device ID
REMS(Read Electronic Manufacturer & Device ID)
90h
X
X
(ADD(1))

Output the manufacturer ID and device ID
REMS2(Read ID from 2X I/O mode)
EFh


(ADD(1))

Output the manufacturer ID and device ID
ENSO(enter secured OTP)
B1h




To enter the 512-bit secured OTP mode
ENSO(exit secured OTP)
C1h




To exit the 512-bit secured OTP mode
RDSCUR(read security register)
2Bh




To read value of security register
WRSCUR(write security register)
2Fh




To set the lock-down bit as “1”(once lock-down, cannot be updated)
ESRY(enable SO to output RY/BY#)
70h




To enable SO output RY/BY# during CP mode
DSRY(disable SO to output RY/BY#)
80h




To disable SO output RY/BY# during CP mode
(1). ADD=00H will output the manufacturer’s ID first and ADD=01H will output device ID first.
(2). It is not recommended to adopt any other code which is not in the above command definition table.

Table of ID Definitions:
RDID(JEDEC) Command
Manufacturer ID
Memory Type
Memory Density
MX25L1605D
C2
20
15
MX25L3205D
C2
20
16
MX25L6405D
C2
20
17
RES Command
Electronic ID
MX25L1605D
14
MX25L3205D
15
MX25L6405D
16
REMS Command
Manufacturer ID
Device ID
MX25L1605D
C2
14
MX25L3205D
C2
15
MX25L6405D
C2
16

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