Set
Device Bits FIS:
|
31
|
30
|
29
|
28
|
27
|
26
|
25
|
24
|
23
|
22
|
21
|
20
|
19
|
18
|
17
|
16
|
15
|
14
|
13
|
12
|
11
|
10
|
9
|
8
|
7
|
6
|
5
|
4
|
3
|
2
|
1
|
0
|
|||||
0
|
Error
|
R
|
Status
Hi
|
R
|
Status
Lo
|
N
|
I
|
R
|
Reserved
(0)
|
FIS
Type (A1h)
|
|||||||||||||||||||||||||||
1
|
ACT
31:0
|
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ACT:
The ACT field of the Set Device Bits FIS
communicates successful completion notification for each of up to 32 queued
commands. The field is bit-significant and the device sets bit positions to one
for each command tag it is indicating successful completion notification for.
The device may set more than one bit to one if it is explicitly aggregating
successful status returns.
Error:The Error register shall be cleared to zero.
Status:
The ERR bit shall be cleared to zero indicating
successful command completion.
I: Interrupt bit. The interrupt bit shall be set to one.
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