Expansion ROM Base Address Register

6.2.5.2.   Expansion ROM Base Address Register

Some PCI devices, especially those that are intended for use on add-in cards in PC architectures, require local EPROMs for expansion ROM (refer to Section 6.3. for a definition of ROM contents).  The four-byte register at offset 30h in a type 00h predefined header is defined to handle the base address and size information for this expansion ROM.  Figure 6-7 shows how this word is organized.  The register functions
exactly like a 32-bit Base Address register except that the encoding (and usage) of the bottom bits is different.  The upper 21 bits correspond to the upper 21 bits of the Expansion ROM base address.  The number of bits (out of these 21) that a device actually implements depends on how much address space the device requires.  For instance, a device that requires a 64 KB area to map its expansion ROM would implement the top 16 bits in the register, leaving the bottom 5 (out of these 21) hardwired to 0.  Devices that
support an expansion ROM must implement this register.

Device independent configuration software can determine how much address space the device requires by writing a value of all 1's to the address portion of the register and then reading the value back.  The device will return 0's in all don't-care bits, effectively specifying the size and alignment requirements.  The amount of address space a device requests must not be greater than 16 MB.

Bit 0 in the register is used to control whether or not the device accepts accesses to its expansion ROM.  When this bit is 0, the device’s expansion ROM address space is disabled.  When the bit is 1, address decoding is enabled using the parameters in the other part of the base register.  This allows a device to be used with or without an expansion ROM depending on system configuration.  The Memory Space bit in the Command register has precedence over the Expansion ROM enable bit.  A device must respond to accesses to its expansion ROM only if both the Memory Space bit and the Expansion ROM Base Address Enable bit are set to 1.  This bit's state after RST# is 0.

In order to minimize the number of address decoders needed, a device may share a decoder between the Expansion ROM Base Address register and other Base Address registers.When expansion ROM decode is enabled, the decoder is used for accesses to the expansion ROM and device independent software must not access the device through any other Base Address registers.